IDT79R3081 |
RFQ for IDT79R3081 Required Field |
 |
| Product | Manufacturers | Pack | D/C |
| IDT79R3081 | - | PLCC | - |
Features |
| • Instruction set compatible with IDT79R3000A, R3041, R3051, and R3071 RISC CPUs• High level of integration minimizes system cost - R3000A Compatible CPU - R3010A Compatible Floating Point Accelerator - Optional R3000A compatible MMU - Large Instruction Cache - Large Data Cache - Read/Write Buffers• 43VUPS at 50MHz - 13MFlops• Flexible bus interface allows simple, low cost designs• Optional 1x or 2x clock input• 20 through 50MHz operation• "V" version operates at 3.3V• 50MHz at 1x clock input and 1/2 bus frequency only• Large on-chip caches with user configurability - 16kB Instruction Cache, 4kB Data Cache - Dynamically configurable to 8kB Instruction Cache, 8kB Data Cache - Parity protection over data and tag fields• Low cost 84-pin packaging• Superset pin- and software-compatible with R3051, R3071• Multiplexed bus interface with support for low-cost, lowspeed memory systems with a high-speed CPU• On-chip 4-deep write buffer eliminates memory write stalls• On-chip 4-deep read buffer supports burst or simple block reads• On-chip DMA arbiter• Hardware-based Cache Coherency Support• Programmable power reduction mode• Bus Interface can operate at half-processor frequency |
| Symbol | Rating | Commercial | Military | Unit |
| VTERM | Terminal Voltage with Respect to GND |
0.5 to +7.0 | 0.5 to +7.0 | V |
| TC | Operating Case Temperature |
0 to +85 | 55 to +125 | |
| TBIAS | Case Temperature Under Bias |
55 to +125 | 65 to +135 | |
| TSTG | Storage Temperature |
55 to +125 | 65 to +155 | |
| VIN | Input Voltage | 0.5 to +7.0 | 0.5 to +7.0 | V |
